The present invention relates generally to CMOS amplifiers and more particularly to a low voltage CMOS amplifier designed for use in oscillator circuits.
Watch circuits, which have a power supply of 1.5 volts, require a stable frequency oscillator as a timing reference which is also compatible with CMOS integrated circuits. Since the power supply voltage may vary from approximately 1.6 volts to 1.2 volts over the useful life of the battery as a function of current drain and time, the oscillator circuit and particularly the amplifier therein should be capable of operating over this voltage variation with a minimum change in the frequency as the supply voltage varies. Similarly, the amplifier portion of the oscillator circuit should be as independent of variation of transistor parameters and temperatures as possible.
A typical crystal oscillator, illustrated in FIG. 1, includes an inverting amplifier A having a crystal Q connected between its input and output and two capacitors C.sub.1 and C.sub.2 connected between the input and output, respectively, and ground. Typical MOS amplifiers used in the oscillator of FIG. 1 are illustrated in FIGS. 2, 3 and 4 as a standard CMOS inverter, an NMOS inverter transistor with a PMOS load transistor, and an NMOS inverter transistor with a resistive load respectively. All three types of inverters of FIGS. 2, 3 and 4 employ some form of direct coupled negative feedback to establish an initial biasing point in the oscillator circuit.
A small signal analysis of the inverter can be undertaken about the self-bias point, which is that voltage that the amplifier's input and output would reach if both the input and output were unloaded except for the direct coupled negative feedback element. The first order of approximation of the MOS transistors source-drain current in the saturated region is given by: EQU I.sub.DS =(K'W/L)(V.sub.GS -V.sub.T).sup.2
for V.sub.DS .gtoreq.V.sub.GS -V.sub.T (Saturation region)
where V.sub.DS =Drain to Source voltage
I.sub.DS =Drain to Source current PA1 W=MOS transistor's channel width PA1 L=MOS transistor's channel length PA1 V.sub.GS =Applied gate to source voltage PA1 V.sub.T =MOS transistor's threshold voltage PA1 K'=Constant determined by process variables
The transconductance, g.sub.m, of each of the three inverters can be calculated: EQU g.sub.m =(.delta.I.sub.DS /.delta.V.sub.GS).vertline.V.sub.DS =constant
Letting K=K'W/L, the g.sub.m of the standard CMOS inverter of FIG. 2 is ##EQU1## The g.sub.m of the NMOS inverter with a PMOS load of FIG. 3 is ##EQU2## The g.sub.m of the NMOS inverter with a resistive load of FIG. 4 is ##EQU3##
An analysis of the gain or transconductance for the amplifiers of FIGS. 2, 3 and 4 show the gain varies as a function of the supply voltage (V.sub.DD), transistor threshold voltage (V.sub.T) and the transistor constant (K). For stable oscillation, the gain of the amplifier must be made independent of voltage supply variations, otherwise, frequency change results, which is undesirable for oscillators used as time basis as, for example, in the watch environment. Thus there exists a need for an inverting amplifier which is capable of operating at low voltages and whose gain is insensitive to voltage supply variations.